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MC100EPT22 3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator
The MC100EPT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL (Positive ECL) levels are used only +3.3 V and ground are required. The small outline 8-lead package and the single gate of the EPT22 makes it ideal for those applications where space, performance, and low power are at a premium. Because the mature MOSAIC 5 process is used, low cost and high speed can be added to the list of features.
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8 8 1 SO-8 D SUFFIX CASE 751 1 8 8 1 TSSOP-8 DT SUFFIX CASE 948R 1 KA22 ALYW KPT22 ALYW
* * * * * *
420 ps Typical Propagation Delay Maximum Frequency > 1.1 GHz Typical Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V PNP LVTTL Inputs for Minimal Loading Q Output Will Default HIGH with Inputs Open The 100 Series Contains Temperature Compensation.
A L Y W
= Assembly Location = Wafer Lot = Year = Work Week
*For additional information, see Application Note AND8002/D
ORDERING INFORMATION
Device MC100EPT22D MC100EPT22DR2 MC100EPT22DT MC100EPT22DTR2 Package SO-8 SO-8 TSSOP-8 Shipping 98 Units/Rail 2500 Tape & Reel 100 Units/Rail
TSSOP-8 2500 Tape & Reel
(c) Semiconductor Components Industries, LLC, 2002
1
June, 2002 - Rev. 7
Publication Order Number: MC100EPT22/D
MC100EPT22
Q0
1
8
VCC
PIN DESCRIPTION
PIN FUNCTION LVPECL Differential Outputs LVTTL Inputs Positive Supply Ground
Q0
2 LVPECL LVTTL
7
D0 Q0, Q1, Q0, Q1 D0, D1
Q1
3
6
D1
VCC GND
Q1
4
5
GND
Figure 1. 8-Lead Pinout (Top View) and Logic Diagram
ATTRIBUTES
Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Human Body Model Machine Model Charged Device Model Value N/A N/A > 4 kV > 200 V > 2 kV Level 1 UL 94 V-0 @ 0.125 in 164 Devices
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Oxygen Index: 28 to 34
MAXIMUM RATINGS (Note 2)
Symbol VCC VI Iout TA Tstg qJA qJC qJA qJC Tsol Power Supply Input Voltage Output Current Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Wave Solder 0 LFPM 500 LFPM std bd 0 LFPM 500 LFPM std bd <2 to 3 sec @ 248C 8 SOIC 8 SOIC 8 SOIC 8 TSSOP 8 TSSOP 8 TSSOP Parameter Condition 1 GND = 0 V GND = 0 V Continuous Surge VI VCC Condition 2 Rating 6 6 to 0 50 100 -40 to +85 -65 to +150 190 130 41 to 44 185 140 41 to 44 265 Units V V mA mA C C C/W C/W C/W C/W C/W C/W C
2. Maximum Ratings are those values beyond which device damage may occur.
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MC100EPT22
TTL INPUT DC CHARACTERISTICS VCC= 3.3 V, GND= 0.0 V, TA= -40C to 85C
Symbol IIH IIHH IIL VIK VIH VIL Characteristic Input HIGH Current Input HIGH Current MAX Input LOW Current Input Clamp Voltage Input HIGH Voltage Input LOW Voltage Condition VIN= 2.7 V VIN= 6.0 V VIN= 0.5 V IIN= -18 mA 2.0 0.8 Min Typ Max 20 100 -0.6 -1.0 Unit mA mA mA V V V
PECL OUTPUT DC CHARACTERISTICS VCC = 3.3 V, GND = 0.0 V (Note 3)
Symbol ICC VOH VOL Characteristic Power Supply Current Output HIGH Voltage (Note 4) Output LOW Voltage (Note 4) Min 32 2155 1355 Typ 43 2280 1480 Max 55 2405 1605 Min 35 2155 1355 Typ 45 2280 1480 Max 60 2405 1605 Min 37 2155 1355 Typ 46 2280 1480 Max 62 2405 1605 Unit mA mV mV
NOTE: Devices are designed to meet the DC specifications shown in the above table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. 3. Output parameters vary 1:1 with VCC. 4. All loading with 50 W to VCC-2.0 V.
AC CHARACTERISTICS VCC= 3.0 V to 3.6 V, GND= 0.0 V (Note 5)
-40C Symbol fmax tPLH, tPHL tJITTER tr tf Characteristic Maximum Frequency (See Figure 2. Fmax/JITTER) Propagation Delay to Output Differential Cycle-to-Cycle Jitter (See Figure 2. Fmax/JITTER) Output Rise/Fall Times (20% - 80%) 50 Q, Q Min 0.8 250 Typ 1.1 400 0.2 110 650 <1 200 60 Max Min 0.8 250 25C Typ 1.1 420 0.2 120 675 <1 220 70 Max Min 0.8 300 85C Typ 1.1 500 0.2 140 700 <1 250 Max Unit GHz ps ps ps
5. Measured using a 2.4 V source, 50% duty cycle clock source. All loading with 50 W to VCC-2.0 V.
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MC100EPT22
900 800 700 VOUTpp (mV) 600 500 400 300 200
9 8 7 6 5 4 3 2 1 (JITTER) 1200 1400 1600 JITTEROUT ps (RMS)
EEEEEEEEEEEEEEE EEEEEEEEEEEEEEE
0 0 200 400 600 800 1000 FREQUENCY (MHz)
100
Figure 2. Fmax/Jitter
Q Driver Device Qb 50 W 50 W
D Receiver Device Db
V TT V TT = V CC - 2.0 V
Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020 - Termination of ECL Logic Devices.)
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EE EE EE
MC100EPT22
Resource Reference of Application Notes
AN1404 AN1405 AN1406 AN1503 AN1504 AN1560 AN1568 AN1596 AN1650 AN1672 AND8001 AND8002 AND8020 - - - - - - - - - - - - - ECLinPS Circuit Performance at Non-Standard VIH Levels ECL Clock Distribution Techniques Designing with PECL (ECL at +5.0 V) ECLinPS I/O SPICE Modeling Kit Metastability and the ECLinPS Family Low Voltage ECLinPS SPICE Modeling Kit Interfacing Between LVDS and ECL ECLinPS Lite Translator ELT Family SPICE I/O Model Kit Using Wire-OR Ties in ECLinPS Designs The ECL Translator Guide Odd Number Counters Design Marking and Date Codes Termination of ECL Logic Devices
For an updated list of Application Notes, please see our website at http://onsemi.com.
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MC100EPT22
PACKAGE DIMENSIONS
-X- A
8 5
SO-8 D SUFFIX PLASTIC SOIC PACKAGE CASE 751-07 ISSUE AA
B
1 4
S
0.25 (0.010)
M
Y
M
-Y- G C -Z- H D 0.25 (0.010)
M SEATING PLANE
K
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDAARD IS 751-07 DIM A B C D G H J K M N S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244
N
X 45 _
0.10 (0.004)
M
J
ZY
S
X
S
TSSOP-8 DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948R-02 ISSUE A
8x
K REF 0.10 (0.004)
M
0.15 (0.006) T U
S 2X
TU
S
V
S
L/2
8
5
L
1 PIN 1 IDENT 4
B -U-
0.25 (0.010) M
0.15 (0.006) T U
S
A -V-
F DETAIL E
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0_ 6_ INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0_ 6_
C 0.10 (0.004) -T- SEATING
PLANE
D
-W- G DETAIL E
DIM A B C D F G K L M
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MC100EPT22
Notes
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MC100EPT22
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PUBLICATION ORDERING INFORMATION
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MC100EPT22/D

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